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1. general description the 74alvc164245 is a high-performance, low-power, low-voltage, si-gate cmos device, superior to most advanc ed cmos compatible ttl families. the 74alvc164245 is a 16-bit (dual octal) dual supply translating transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. it is designed to interface between a 3 v and 5 v bus in a mixed 3 v and 5 v supply environment. this device can be used as two 8-bit tr ansceivers or one 16-bit transceiver. the direction control inputs (1dir and 2dir) determine the directi on of the data flow. ndir (active high) enables data from nan port s to nbn ports. ndir (active low) enables data from nbn ports to nan ports. the output enable inputs (1oe and 2oe ), when high, disable both nan and nbn ports by placing them in a high-impedance off-state. pins nan, noe and ndir are referenced to v cc(a) and pins nbn are referenced to v cc(b) . in suspend mode, when one of the supply volt ages is zero, there will be no current flow from the non-zero supply towards the zero supply. the nan-outputs must be set 3-state and the voltage on the a-bus must be smaller than v diode (typical 0.7 v). v cc(b) ? v cc(a) (except in suspend mode). 2. features and benefits ? 5 v tolerant inputs/outputs for interfacing with 5 v logic ? wide supply voltage range: ? 3 v port (v cc(a) ): 1.5 v to 3.6 v ? 5 v port (v cc(b) ): 1.5 v to 5.5 v ? cmos low power consumption ? direct interface with ttl levels ? control inputs voltage range from 2.7 v to 5.5 v ? inputs accept voltages up to 5.5 v ? high-impedance outputs when v cc(a) or v cc(b) = 0 v ? complies with jedec standard jesd8-b/jesd36 ? esd protection: ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v ? specified from ? 40 ? c to +85 ? c and ? 40 ? c to +125 ? c 74alvc164245 16-bit dual supply translating transceiver; 3-state rev. 6 ? 16 june 2011 product data sheet
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 2 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state 3. ordering information 4. functional diagram table 1. ordering information type number temperature range package name description version 74alvc164245dl ? 40 ? c to +125 ? c ssop48 plastic shrink small outline package; 48 leads; body width 7.5 mm sot370-1 74ALVC164245DGG ? 40 ? c to +125 ? c tssop48 plastic thin shrink small outline package; 48 leads; body width 6.1 mm sot362-1 74alvc164245bx ? 40 ? c to +125 ? c hxqfn60u plastic thermal enhanced extremely thin quad flat package; no leads; 60 terminals; utlp based; body 4 ?? 6 ? 0.5 mm sot1134-1 fig 1. logic symbol 1dir 1b0 1b1 1b2 1b3 1b4 1b5 1b6 1b7 2b0 2b1 2b2 2b3 2b4 2b5 2b6 2b7 1a0 1a1 1a2 1a3 1a4 1a5 1a6 1a7 2a0 2a1 2a2 2a3 2a4 2a5 2a6 2a7 1oe 2dir 2oe 001aaa789
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 3 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state fig 2. iec logic symbol g3 g6 3en1[ba] 6en1[ba] 3en2[ab] 6en2[ab] 1a0 2a1 2a0 2a2 2a3 2a4 2a5 2a6 2a7 2b1 2b2 2b3 2b4 2b5 2b6 2b7 1oe 1dir 001aaa790 1a1 1a2 1a3 1a4 1a5 1a6 1a7 1b0 2b0 1b1 1b2 1b3 1b4 1b5 1b6 1b7 5 4 2 1 2oe 2dir
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 4 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state 5. pinning information 5.1 pinning fig 3. pin configuration sot370-1 (ssop48) and sot362-1 (tssop48) 74alvc164245 1dir 1oe 1b0 1a0 1b1 1a1 gnd gnd 1b2 1a2 1b3 1a3 v cc(b) v cc(a) 1b4 1a4 1b5 1a5 gnd gnd 1b6 1a6 1b7 1a7 2b0 2a0 2b1 2a1 gnd gnd 2b2 2a2 2b3 2a3 v cc(b) v cc(a) 2b4 2a4 2b5 2a5 gnd gnd 2b6 2a6 2b7 2a7 2dir 2oe 001aab037 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 5 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state (1) the die substrate is attached to this p ad using conductive die attach material. it can not be used as a supply pin or input. fig 4. pin configuration sot1134-1 (hxqfn60u) d1 d3 a16 a15 a14 a13 a12 a11 d2 b9 b10 d7 a17 a18 b11 a19 b12 a20 b13 a21 b14 b8 a10 d6 a9 a8 b7 b6 a7 b5 a6 a22 b15 a23 b16 a24 b17 a25 a26 d8 d4 a27 b18 a28 a29 b19 b20 a30 a31 a32 b4 a5 b3 b2 b1 d5 a4 a3 a2 a1 74alvc164245 001aai851 transparent top view gnd (1) terminal 1 index area
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 6 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state 5.2 pin description 6. functional description [1] h = high voltage level; l = low voltage level; x = don?t care; z = high-impedance off-state. 7. limiting values table 2. pin description symbol pin description sot370-1 and sot362-1 sot1134-1 1dir, 2dir 1, 24 a30, a13 direction control input 1b0 to 1b7 2, 3, 5, 6, 8, 9, 11, 12 b20, a31, d5, d1, a2, b2, b3, a5 data input/output 2b0 to 2b7 13, 14, 16, 17, 19, 20, 22, 23 a6, b5, b6, a9, d2, d6, a12, b8 data input/output gnd 4, 10, 15, 21, 28, 34, 39, 45 a32, a3, a8, a11, a16, a19, a24, a27 ground (0 v) v cc(b) 7, 18 a1, a10, supply voltage b (5 v bus) 1oe , 2oe 48, 25 a29, a14 output e nable input (active low) 1a0 to 1a7 47, 46, 44, 43, 41, 40, 38, 37 b18, a 28, d8, d4, a25, b16, b1 5, a22 data input/output 2a0 to 2a7 36, 35, 33, 32, 30, 29, 27, 26 a21, b 13, b12, a18, d3, d7, a1 5, b10 data input/output v cc(a) 31, 42 a17, a26 supply voltage a (3 v bus) n.c. - a4, a7, a20, a23, b1, b4, b7, b9, b11, b14, b17, b19 not connected table 3. function table [1] inputs outputs noe ndir nan nbn l l nan = nbn inputs l h inputs nbn = nan hxz z table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). see [1] . symbol parameter conditions min max unit v cc(b) supply voltage b v cc(b) ? v cc(a) ? 0.5 +6.0 v v cc(a) supply voltage a v cc(b) ? v cc(a) ? 0.5 +4.6 v i ik input clamping current v i <0v ? 50 - ma v i input voltage [2] ? 0.5 +6.0 v v i/o input/output voltage ? 0.5 v cc +0.5 v i ok output clamping current v o >v cc or v o <0v - ? 50 ma v o output voltage output high or low [2] ? 0.5 v cc +0.5 v output 3-state [2] ? 0.5 +6.0 v i o(sink/source) output sink or source current v o =0vtov cc - ? 50 ma i cc supply current - 100 ma
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 7 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state [1] the performance capability of a high-perfo rmance integrated circuit in conjunction with its thermal environment can create j unction temperatures which are detrimental to reli ability. the maximum junction temperature of this integrated circuit should not excee d 150 ? c. [2] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [3] above 60 ? c the value of p tot derates linearly with 5.5 mw/k. [4] above 70 ? c the value of p tot derates linearly with 1.8 mw/k. 8. recommended operating conditions i gnd ground current ? 100 - ma t stg storage temperature ? 65 +150 ?c p tot total power dissipation t amb = ? 40 ? c to +125 ? c (t)ssop48 package [3] -5 0 0m w hxqfn60u package [4] - 1000 mw table 4. limiting values ?continued in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). see [1] . symbol parameter conditions min max unit table 5. recommended operating conditions symbol parameter conditions min typ max unit v cc(b) supply voltage b v cc(b) ? v cc(a) maximum speed performance 2.7 - 5.5 v low-voltage applications 1.5 - 5.5 v v cc(a) supply voltage a v cc(b) ? v cc(a) maximum speed performance 2.7 - 3.6 v low-voltage applications 1.5 - 3.6 v v i input voltage control inputs: n oe and ndir 0- 5.5v v i/o input/output voltage nan port 0 - v cc(a) v nbn port 0 - v cc(b) v v o output voltage nan port 0 - v cc(a) v nbn port 0 - v cc(b) v t amb ambient temperature ? 40 - +125 ?c ? t/ ? v input transition rise and fall rate v cc(a) = 2.7 v to 3.0 v 0 - 20 ns/v v cc(a) = 3.0 v to 3.6 v 0 - 10 ns/v v cc(b) = 3.0 v to 4.5 v 0 - 20 ns/v v cc(b) = 4.5 v to 5.5 v 0 - 10 ns/v
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 8 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state 9. static characteristics table 6. static characteristics at recommended operating conditions; voltag es are referenced to gnd (ground = 0 v). symbol parameter conditions t amb = ? 40 ? c to +85 ?c t amb = ? 40 ? c to +125 ?c unit min typ [1] max min typ [1] max v ih high-level input voltage nbn port v cc(b) = 3.0 v to 5.5 v [2] 2.0 - - 2.0 - - v nan port, noe and ndir v cc(a) = 3.0 v to 3.6 v 2.0 - - 2.0 - - v v cc(a) = 2.3 v to 2.7 v [2] 1.7 - - 1.7 - - v v il low-level input voltage nbn port v cc(b) = 4.5 v to 5.5 v [2] --0.8--0.8v v cc(b) = 3.0 v to 3.6 v [2] --0.7--0.7v nan port, noe and ndir v cc(a) = 3.0 v to 3.6 v - - 0.8 - - 0.8 v v cc(a) = 2.3 v to 2.7 v [2] --0.7--0.7v v oh high-level output voltage nbn port; v i =v ih or v il i o = ? 24 ma; v cc(b) = 4.5 v v cc(b) ? 0.8 - - v cc(b) ? 1.2 - - v i o = ? 12 ma; v cc(b) = 4.5 v v cc(b) ? 0.5 - - v cc(b) ? 0.8 - - v i o = ? 18 ma; v cc(b) = 3.0 v v cc(b) ? 0.8 - - v cc(b) ? 1.0 - - v i o = ? 100 ? a; v cc(b) = 3.0 v v cc(b) ? 0.2 v cc(b) -v cc(b) ? 0.3 v cc(b) -v nan port; v i =v ih or v il i o = ? 24 ma; v cc(a) = 3.0 v v cc(a) ? 0.7 - - v cc(a) ? 1.0 - - v i o = ? 100 ? a; v cc(a) = 3.0 v v cc(a) ? 0.2 - - v cc(a) ? 0.3 - - v i o = ? 12 ma; v cc(a) = 2.7 v v cc(a) ? 0.5 - - v cc(a) ? 0.8 - - v i o = ? 8ma; v cc(a) = 2.3 v v cc(a) ? 0.6 - - v cc(a) ? 0.6 - - v i o = ? 100 ? a; v cc(a) = 2.3 v v cc(a) ? 0.2 v cc(a) -v cc(a) ? 0.3 v cc(a) -v v ol low-level output voltage nbn port; v i =v ih or v il i o =24ma; v cc(b) = 4.5 v - - 0.55 - - 0.60 v i o = 12 ma; v cc(b) = 4.5 v - - 0.40 - - 0.80 v i o = 100 ? a; v cc(b) = 4.5 v - - 0.20 - - 0.30 v i o = 18 ma; v cc(b) = 3.0 v - - 0.55 - - 0.80 v i o = 100 ? a; v cc(b) = 3.0 v - - 0.20 - - 0.30 v nan port; v i =v ih or v il i o = 24 ma; v cc(a) = 3.0 v - - 0.55 - - 0.80 v i o = 100 ? a; v cc(a) = 3.0 v - - 0.20 - - 0.30 v i o = 12 ma; v cc(a) = 2.7 v - - 0.40 - - 0.60 v i o = 12 ma; v cc(a) = 2.3 v - - 0.60 - - 0.60 v i o = 100 ? a; v cc(a) = 2.3 v - - 0.20 - - 0.20 v i i input leakage current v i =5.5vorgnd - ? 0.1 ? 5- ? 0.1 ? 10 ? a i oz off-state output current v i =v ih or v il ; v o =v cc or gnd [3] - ? 0.1 ? 10 - ? 0.1 ? 20 ? a
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 9 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state [1] all typical values are measured at v cc(b) = 5.0 v, v cc(a) = 3.3 v and t amb =25 ? c. [2] if v cc(a) < 2.7 v, the switching levels at all inputs are not ttl compatible. [3] for transceivers, the parameter i oz includes the input leakage current. [4] v cc(a) = 2.7 v to 3.6 v: other inputs at v cc(a) or gnd; v cc(b) = 4.5 v to 5.5 v: other inputs at v cc(b) or gnd. 10. dynamic characteristics i cc supply current v i =v cc or gnd; i o = 0 a - 0.1 40 - 0.1 80 ? a ? i cc additional supply current per control pin; v i =v cc ? 0.6 v; i o =0a [4] - 5 500 - 5 5000 ? a c i input capacitance -4.0- - --pf c i/o input/output capacitance nan and nbn port - 5.0 - - - - pf table 6. static characteristics ?continued at recommended operating conditions; voltag es are referenced to gnd (ground = 0 v). symbol parameter conditions t amb = ? 40 ? c to +85 ?c t amb = ? 40 ? c to +125 ?c unit min typ [1] max min typ [1] max table 7. dynamic characteristics gnd = 0 v; t r = t f ? 2.5 ns; c l = 50 pf; for test circuit see figure 7 . symbol parameter conditions t amb = ? 40 ? c to +85 ?c t amb = ? 40 ? c to +125 ?c unit min typ [1] max min max t pd propagation delay nan to nbn; see figure 5 [2] v cc(a) = 2.3 v to 2.7 v; v cc(b) = 3.0 v to 3.6 v 1.5 3.3 7.6 1.5 9.5 ns v cc(a) = 2.7 v; v cc(b) = 4.5 v to 5.5 v 1.0 3.0 5.9 1.0 7.5 ns v cc(a) = 3.0 v to 3.6 v; v cc(b) = 4.5 v to 5.5 v 1.0 2.9 5.8 1.0 7.5 ns nbn to nan; see figure 5 [2] v cc(a) = 2.3 v to 2.7 v; v cc(b) = 3.0 v to 3.6 v 1.0 3.0 7.6 1.0 9.5 ns v cc(a) = 2.7 v; v cc(b) = 4.5 v to 5.5 v 1.0 4.3 6.7 1.0 8.5 ns v cc(a) = 3.0 v to 3.6 v; v cc(b) = 4.5 v to 5.5 v 1.2 2.5 5.8 1.2 7.5 ns
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 10 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state t en enable time noe to nbn; see figure 6 [2] v cc(a) = 2.3 v to 2.7 v; v cc(b) = 3.0 v to 3.6 v 1.5 4.1 11.5 1.5 14.5 ns v cc(a) = 2.7 v; v cc(b) = 4.5 v to 5.5 v 1.5 3.6 9.2 1.5 11.5 ns v cc(a) = 3.0 v to 3.6 v; v cc(b) = 4.5 v to 5.5 v 1.0 3.2 8.9 1.0 12.0 ns noe to nan; see figure 6 [2] v cc(a) = 2.3 v to 2.7 v; v cc(b) = 3.0 v to 3.6 v 1.5 4.6 12.3 1.5 15.5 ns v cc(a) = 2.7 v; v cc(b) = 4.5 v to 5.5 v 1.5 4.3 9.3 1.5 12.0 ns v cc(a) = 3.0 v to 3.6 v; v cc(b) = 4.5 v to 5.5 v 1.0 3.2 8.9 1.0 11.5 ns t dis disable time noe to nbn; see figure 6 [2] v cc(a) = 2.3 v to 2.7 v; v cc(b) = 3.0 v to 3.6 v 2.0 2.7 10.5 2.0 13.5 ns v cc(a) = 2.7 v; v cc(b) = 4.5 v to 5.5 v 2.5 4.6 9.0 2.5 11.5 ns v cc(a) = 3.0 v to 3.6 v; v cc(b) = 4.5 v to 5.5 v 2.1 4.9 8.6 2.1 11.0 ns noe to nan; see figure 6 [2] v cc(a) = 2.3 v to 2.7 v; v cc(b) = 3.0 v to 3.6 v 1.0 2.7 9.3 1.0 12.0 ns v cc(a) = 2.7 v; v cc(b) = 4.5 v to 5.5 v 1.5 3.5 9.0 1.5 11.5 ns v cc(a) = 3.0 v to 3.6 v; v cc(b) = 4.5 v to 5.5 v 2.0 3.2 8.6 2.0 11.0 ns table 7. dynamic characteristics ?continued gnd = 0 v; t r = t f ? 2.5 ns; c l = 50 pf; for test circuit see figure 7 . symbol parameter conditions t amb = ? 40 ? c to +85 ?c t amb = ? 40 ? c to +125 ?c unit min typ [1] max min max
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 11 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state [1] all typical values are measured at nominal voltage for v cc(b) and v cc(a) and at t amb =25 ? c. [2] t pd is the same as t plh and t phl . t en is the same as t pzl and t pzh . t dis is the same as t plz and t phz . [3] c pd is used to determine the dynamic power dissipation (p d in ? w). p d =c pd ? v cc 2 ? f i ? n+ ? (c l ? v cc 2 ? f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? (c l ? v cc 2 ? f o ) = sum of outputs. [4] the condition is v i = gnd to v cc . 11. ac waveforms c pd power dissipation capacitance 5 v port: nan to nbn; v cc(b) = 5 v; v cc(a) = 3.3 v [3] [4] outputs enabled - 30 - - - pf outputs disabled - 15 - - - pf 3 v port: nbn to nan; v cc(b) = 5 v; v cc(a) = 3.3 v [3] [4] outputs enabled - 40 - - - pf outputs disabled - 5 - - - pf table 7. dynamic characteristics ?continued gnd = 0 v; t r = t f ? 2.5 ns; c l = 50 pf; for test circuit see figure 7 . symbol parameter conditions t amb = ? 40 ? c to +85 ?c t amb = ? 40 ? c to +125 ?c unit min typ [1] max min max measurement points are given in table 8 . v ol and v oh are typical output voltage levels that occur with the output load. fig 5. input (nan, nbn) to output (nbn, nan) propagation delays 001aaa792 nan, nbn input nbn, nan output t phl t plh gnd v i v m v m v oh v ol
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 12 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state measurement points are given in table 8 . v ol and v oh are typical output voltage levels that occur with output load. fig 6. 3-state enable and disable times mna362 t plz t phz outputs disabled outputs enabled v y v x outputs enabled output low-to-off off-to-low output high-to-off off-to-high noe input v i v ol v oh v cc v m gnd gnd t pzl t pzh v m v m table 8. measurement points direction supply voltage input output v cc(a) v cc(b) v i v m v m v x v y nan port to nbn port 2.3 v to 2.7 v 2.7 v to 3.6 v v cc(a) 0.5 ? v cc(a) 1.5 v v ol(b) + 0.3 v v oh(b) ? 0.3 v nbn port to nan port 2.3 v to 2.7 v 2.7 v to 3.6 v 2.7 v 1.5 v 0.5 ? v cc(a) v ol(a) + 0.15 v v oh(a) ? 0.15 v nan port to nbn port 2.7 v to 3.6 v 4.5 v to 5.5 v 2.7 v 1.5 v 0.5 ? v cc(b) 0.2 ? v cc(b) 0.8 ? v cc(b) nbn port to nan port 2.7 v to 3.6 v 4.5 v to 5.5 v 3.0 v 1.5 v 1.5 v v ol(a) + 0.3 v v oh(a) ? 0.3 v
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 13 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state test data is given in table 9 . definitions for test circuit: r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including jig and probe capacitance. r l = load resistance. fig 7. load circuitry for switching times v ext v cc v i v o mna616 dut c l r t r l r l g table 9. test data direction supply voltage load v ext v cc(a) v cc(b) c l r l t plh , t phl t pzh , t phz t pzl , t plz nan port to nbn port 2.3 v to 2.7 v 2.7 v to 3.6 v 50 pf 500 ? open gnd 2 ? v cc nbn port to nan port 2.3 v to 2.7 v 2.7 v to 3.6 v 50 pf 500 ? open gnd 6.0 v nan port to nbn port 2.7 v to 3.6 v 4.5 v to 5.5 v 50 pf 500 ? open gnd 2 ? v cc nbn port to nan port 2.7 v to 3.6 v 4.5 v to 5.5 v 50 pf 500 ? open gnd 6.0 v
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 14 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state 12. package outline fig 8. package outline sot370-1 (ssop48) unit a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm 0.4 0.2 2.35 2.20 0.25 0.3 0.2 0.22 0.13 16.00 15.75 7.6 7.4 0.635 1.4 0.25 10.4 10.1 1.0 0.6 1.2 1.0 0.85 0.40 8 0 o o 0.18 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot370-1 99-12-27 03-02-19 (1) w m b p d h e e z e c v m a x a y 48 25 mo-118 24 1 ssop48: plastic shrink small outline package; 48 leads; body width 7.5 mm sot370-1 a max. 2.8
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 15 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state fig 9. package outline sot362-1 (tssop48) unit a 1 a 2 a 3 b p cd (1) e (2) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.2 0.1 8 0 o o 0.1 dimensions (mm are the original dimensions). notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. sot362-1 99-12-27 03-02-19 w m tssop48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm sot362-1 a max. 1.2 0 2.5 5 mm scale mo-153
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 16 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state fig 10. package outline sot1134-1 (hxqfn60u) references outline version european projection issue date iec jedec jeita sot1134-1 - - - - - - - - - sot1134-1_po 08-12-17 09-01-22 unit mm max nom min 0.50 0.48 0.46 0.05 0.02 0.00 4.1 4.0 3.9 1.90 1.85 1.80 6.1 6.0 5.9 3.90 3.85 3.80 1 2.5 4.5 0.125 0.075 0.025 0.07 a dimensions hxqfn60u: plastic thermal enhanced extremely thin quad flat package; no leads; 60 terminals; utlp based; body 4 x 6 x 0.5 mm sot1134-1 a 1 b 0.35 0.30 0.25 dd h ee h 0.08 0.1 yy 1 e 0.5 e 1 e 2 e 3 3 e 4 er 0.5 k 0.25 0.20 0.15 l 0.35 0.30 0.25 l 1 v 0.05 w 0 2.5 5 mm scale ac b v c w b a terminal 1 index area d e c y c y 1 x detail x a a 1 e r e 3 e 4 e 2 e 1 e e 1/2 e 1/2 e b ac b v c w k l b20 b18 a27 d8 d4 a32 d5 d7 d6 d1 d3 d2 d h e h l 1 terminal 1 index area a11 a16 b10 b8 a17 b11 b17 a26 a1 b1 a10 b7
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 17 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state 13. abbreviations 14. revision history table 10. abbreviations acronym description cmos complementary metal oxide semiconductor dut device under test esd electrostatic discharge hbm human body model mm machine model ttl transistor-transistor logic table 11. revision history document id release date data sheet status change notice supersedes 74alvc164245 v.6 20110616 product data sheet - 74alvc164245 v.5 modifications: ? 74alvc164245bq changed to 74alvc164245bx for hxqfn60u (sot1134-1) package. 74alvc164245 v.5 20100413 product data sheet - 74alvc164245 v.4 modifications: ? 74alvc164245bq changed from huqfn60u (sot1025-1) to hxqfn60u (sot1134-1) package. 74alvc164245 v.4 20081111 product data sheet - 74alvc 164245 v.3 74alvc164245 v.3 20040914 product data sheet - 74alvc164245 v.2 74alvc164245 v.2 20040601 product data sheet - 74alvc164245 v.1 74alvc164245 v.1 19980826 product specification - -
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 18 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 15.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 15.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use in automotive applications ? this nxp semiconductors product has been qua lified for use in automotive applications. the product is not desi gned, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be ex pected to result in personal injury, death or severe property or environmental dam age. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
74alvc164245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 6 ? 16 june 2011 19 of 20 nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from national authorities. 15.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 16. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74alvc164245 16-bit dual supply translating transceiver; 3-state ? nxp b.v. 2011. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 16 june 2011 document identifier: 74alvc164245 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 functional description . . . . . . . . . . . . . . . . . . . 6 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 8 recommended operating conditions. . . . . . . . 7 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 8 10 dynamic characteristics . . . . . . . . . . . . . . . . . . 9 11 ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . 11 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 13 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 18 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 15.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 15.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 16 contact information. . . . . . . . . . . . . . . . . . . . . 19 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

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